Global Unichip Corp

Cadence announced an expanded partnership with TSMC to deliver certified tool flows and silicon-proven IP for AI and HPC designers on TSMC's most advanced processes. Cadence has achieved tool certification for TSMC's A14 process, demonstrated an industry-leading UALink solution in TSMC N3P, and introduced new silicon-proven IP for N3P and N2P technologies. The collaboration enables agentic AI chip and 3D-IC design flows across TSMC's N3, N2, A16 and A14 process technologies, including TSMC 3DFabric support for wafer-scale systems with hundreds of chiplets. Cadence's digital full flow, signoff flow, and custom/analog flows are now certified for TSMC A16 and A14, with Virtuoso Studio solutions reducing iterations by up to 2.5X, while UCIe-64G has been taped out on A14 and Artisan Foundation IP for A14 is expected to be available in Q4 2026. Cadence analog, digital, and signoff tool flows have also been certified for TSMC N2P, with taped-out N2P IP including DDR5, LPDDR5, and PCIe 6.0, and PCIe 3.0 IP expected to tape out in Q4 2026. Global Unichip Corp. is leveraging Cadence solutions to deliver advanced custom silicon for AI accelerators and hyperscale systems on TSMC's leading-edge process technologies.